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<feed xmlns="http://www.w3.org/2005/Atom"><title type="html"><![CDATA[大道无极‘技术BLOG]]></title><subtitle type="html"><![CDATA[单片机嵌入式技术交流]]></subtitle><id>http://www.dadwj.cn/</id><link rel="alternate" type="text/html" href="http://www.dadwj.cn/"/><link rel="self" type="application/atom+xml" href="http://www.dadwj.cn/atom.xml"/><generator uri="http://www.rainbowsoft.org/" version="1.8 Devo Build 80201">RainbowSoft Studio Z-Blog</generator><updated>2008-06-06T12:30:15+08:00</updated><entry><title type="html"><![CDATA[基于TMS320DM642的IP视频电话的设计]]></title><author><name>kingmacth</name><uri>http://dadwj.cn/</uri><email>kingmacth@sina.com</email></author><category term="" scheme="http://www.dadwj.cn/catalog.asp?cate=10" label="论文"/><updated>2008-06-06T12:28:39+08:00</updated><published>2008-06-06T12:28:39+08:00</published><summary type="html"><![CDATA[<p><b><span style="font-size: 16pt">The Design of IP Videophone Based on TMS320DM642</span></b></p><div style="line-height: 16pt"><b><span style="font-size: 12pt">摘要</span></b>：本文提出了一种基于TI公司的TMS320DM642EVM平台的可视电话的解决方案，该方案是在单芯片上实现H.264视频和G.711音频的编解码算法并行实时处理，从而实现IP视频电话实时通信要求。</div><div style="line-height: 16pt"><b><span style="font-size: 12pt">关键词：</span></b>H.264标准；G.711标准；IP视频电话；DM642处理器</div><div style="line-height: 16pt"><b><span style="font-size: 12pt">Abstract</span></b><b>: T</b>he paper introduces a design the IP videophone based on TMS320DM642 Evaluation Module, The design is that parallel real-time processing of H.264 video codec and G.711 audio codec is realized in the same chip, and real-time communication for videophone is achieved.</div><div style="line-height: 16pt"><b><span style="font-size: 12pt">Keywords</span>: </b>H.264 standard; G.711 standard; IP videophone; processor of DM642</div>]]></summary><link rel="alternate" type="text/html" href="http://www.dadwj.cn/post/872.html"/><id>http://www.dadwj.cn/post/872.html</id></entry><entry><title type="html"><![CDATA[基于SOPC的DSP系统的研究与设计]]></title><author><name>kingmacth</name><uri>http://dadwj.cn/</uri><email>kingmacth@sina.com</email></author><category term="" scheme="http://www.dadwj.cn/catalog.asp?cate=8" label="CPLD/FPGA"/><updated>2008-06-06T12:26:58+08:00</updated><published>2008-06-06T12:26:58+08:00</published><summary type="html"><![CDATA[<p><b>摘&nbsp;要：</b>主要研究基于<span>SOPC的DSP系统的设计与实现。根据待实现的DSP算法的特征，利用QUARTUS中提供的丰富的功能模块和VHDL语言进行设计。经过仿真和开发板上验证，证明了采用FPGA技术的数字信号处理器的速度要远远快于一般的通用DSP，为高速数据处理与通信技术的应用提供了另外一种解决方案。</span></p><div><b>关键词：</b>FPGA；<span>NIOS；流水线；蝶形运算</span></div><div><b><font size="3"><span style="font-size: 10.5pt">Research and Design Based on DSP System of SOPC</span></font></b></div><div style="layout-grid-mode: char"><b>Abstract:</b> This article main research Design and Realization Based on DSP System of SOPC. According to the characteristic of DSP algorithm to be realized , utilize abundant function module and VHDL language offered in QUARTUS to design. After the simulation confirmation, this system has achieved the design goal. Prove that adopts FPGA technology, can shorten design cycle greatly , can also obtain high performance , meet the cost requirement, enjoy to designing the flexibility optimized newly effectively fast.</div><div style="margin-right: 21pt"><b>Key words: </b>FPGA；NIOS；Pipelining；Papilionaceous operation</div>]]></summary><link rel="alternate" type="text/html" href="http://www.dadwj.cn/post/871.html"/><id>http://www.dadwj.cn/post/871.html</id></entry><entry><title type="html"><![CDATA[基于TMS320F240 DSP的SVPWM实现]]></title><author><name>kingmacth</name><uri>http://dadwj.cn/</uri><email>kingmacth@sina.com</email></author><category term="" scheme="http://www.dadwj.cn/catalog.asp?cate=10" label="论文"/><updated>2008-06-06T12:25:36+08:00</updated><published>2008-06-06T12:25:36+08:00</published><summary type="html"><![CDATA[<p>摘要：本文给出了基于TMS320F240 DSP的SVPWM实现方法，该方法充分利用了TMS320F240 DSP片内电机控制模块的资源。同时应用于三相整流器系统中，实验结果证实所提出的实现方法是正确可行的。</p><div style="text-indent: 21pt; line-height: 16pt">关键词：空间电压矢量；数字信号处理器；事件管理器；整流器</div><div style="text-indent: 21pt; line-height: 16pt">&nbsp;</div><div style="line-height: 16pt" align="center">Realization of Space Vector PWM Based on TMS320F240 DSP</div><div style="text-indent: 24pt; line-height: 16pt"><span style="font-size: 12pt">Abstract</span><span style="font-size: 12pt">：</span><span style="font-size: 12pt">The method of realizing SVPWM based on </span>TMS320F240 DSP is proposed. The method takes full advantage of the on-chip resource of motor control of TMS320F240 DSP. The experiments are carried out on the system of three-phase rectifier and the experimental result verify that the proposed method is correct and feasible.</div><div style="text-indent: 24pt; line-height: 16pt"><span style="font-size: 12pt">Key words</span><span style="font-size: 12pt">：</span><span style="font-size: 12pt">space voltage vector</span><span style="font-size: 12pt">；</span>digital signal processor ；event manager<span style="font-size: 12pt">；</span><span style="font-size: 12pt">rectifier</span></div>]]></summary><link rel="alternate" type="text/html" href="http://www.dadwj.cn/post/870.html"/><id>http://www.dadwj.cn/post/870.html</id></entry><entry><title type="html"><![CDATA[DSP和小波变换在配电网接地选线中的应用]]></title><author><name>kingmacth</name><uri>http://dadwj.cn/</uri><email>kingmacth@sina.com</email></author><category term="" scheme="http://www.dadwj.cn/catalog.asp?cate=10" label="论文"/><updated>2008-06-06T12:24:07+08:00</updated><published>2008-06-06T12:24:07+08:00</published><summary type="html"><![CDATA[<p><b>摘要：</b>本文应用小波包良好的频域分频特性，以适当频率带宽对配电网发生单相接地故障后暂态电气量进行分解，得到其在不同频段下的输出。对于中性点接地方式不同的配电网<span>,按照能量的观点,选择不同的频段，利用波形识别技术来实现故障选线。根据小波算法对硬件系统的要求，充分利用数字信号处理器DSP芯片优越的数字信号处理功能和快速的运算速度，实现了故障选线算法。并通过高压动模实验故障数据验证了文中方法的正确性和可行性。</span></p><div style="line-height: 16pt"><b>关键词：</b>DSP；小波变换；故障选线</div><div style="line-height: 16pt" align="center"><b>APPLICATION OF DSP AND WAVELET PACKETS FOR FAULT IDENTIFICATION </b></div><div style="line-height: 16pt"><b>Abstract</b><b>：</b>Applying the good property of frequency division of wavelet packets, transient electrical quantities, which appears in the distribution networks occurring a single phase to ground fault, is decomposed to obtain the outputs of different frequency bands. In view of energy, using waveform recognition, the different frequency band is chosen corresponding to the distribution system with the different neutral grounding mode. According to the requisition of wavelet algorithm for hardware, the advantages of DSP, digital signal processing function and high calculating speed, make the algorithm possible to be fast processed in time. Dynamic mould laboratory emulation results showed that the fusion strategy exhibits excellent property over the existing criteria.</div><div style="line-height: 16pt"><b>Key words</b>：DSP；wavelet transform；fault line identification</div>]]></summary><link rel="alternate" type="text/html" href="http://www.dadwj.cn/post/869.html"/><id>http://www.dadwj.cn/post/869.html</id></entry><entry><title type="html"><![CDATA[基于TMS320C5510的FIR滤波器设计与实现]]></title><author><name>kingmacth</name><uri>http://dadwj.cn/</uri><email>kingmacth@sina.com</email></author><category term="" scheme="http://www.dadwj.cn/catalog.asp?cate=10" label="论文"/><updated>2008-06-06T12:22:33+08:00</updated><published>2008-06-06T12:22:33+08:00</published><summary type="html"><![CDATA[<p><b>摘要 </b>&nbsp;&nbsp;数字滤波技术是数字信号处理的重要组成部分，滤波器的设计是信号处理的核心问题之一。<span>DSP由于其本身具有并行的硬件乘法器、流水结构以及快速的片内存储器等资源,已广泛地应用于数字信号处理各个领域.文章结合TM320C5510的结构特点，介绍了一种FIR滤波器在TM320C5510中的实现方法。文中程序已经过硬件验证，仿真结果表明该设计符合要求。</span></p><div><b>关键词</b> &nbsp;数字滤波， <span>FIR， DSP，MAC</span></div><div><b>&nbsp;</b></div><div><b>Abstract&nbsp; </b><span style="font-size: 12pt">&nbsp;Digital filtering is an important part of digital signal processing, the design of digital filters is one of the kernel problems in digital signal processing.</span> With many excellent features, DSP is used widely in various fields of <span style="font-size: 12pt">digital signal processing</span> . This paper introduced a method to design FIR filter based on TMS320C5510 according to its structure character. The program involved has been verified through hardware and the simulation result shows the design meets the requirement .</div><div><b>Key words &nbsp;</b>digital filter， FIR ， DSP，MAC</div>]]></summary><link rel="alternate" type="text/html" href="http://www.dadwj.cn/post/868.html"/><id>http://www.dadwj.cn/post/868.html</id></entry><entry><title type="html"><![CDATA[DSP应用系统中的硬件接口电路设计]]></title><author><name>kingmacth</name><uri>http://dadwj.cn/</uri><email>kingmacth@sina.com</email></author><category term="" scheme="http://www.dadwj.cn/catalog.asp?cate=10" label="论文"/><updated>2008-06-06T12:21:06+08:00</updated><published>2008-06-06T12:21:06+08:00</published><summary type="html"><![CDATA[<p><b>摘要：</b>介绍了DSP应用系统的硬件接口电路：包括电平变换电路、仿真器JTAG接口电路、以及可扩展的硬件接口（如A/D、D/A、SRAM）等的设计方法，并给出了接口电路在设计时须注意的几个问题。</p><div style="line-height: 16pt"><b>关键词：</b>DSP&nbsp; 硬件接口电路&nbsp;电平变换</div><div>Designing of Hardware Interface Circuit in DSP Applying System</div><div style="line-height: 16pt"><b><span style="font-size: 12pt">Abstract</span></b><b><span style="font-size: 12pt">：</span></b><span style="font-size: 12pt">Introducesthe design means of hardware interface circuits in DSP applying system : logic level switching circuit</span><span style="font-size: 12pt">、</span><span style="font-size: 12pt">simulator </span>JTAG<span style="font-size: 12pt"> circuit </span><span style="font-size: 12pt">、</span><span style="font-size: 12pt">and the expandable hardware interface</span> (such as A/D、D/A&nbsp; and SRAM)<span style="font-size: 12pt"> ,&nbsp; also introduces the problems which needed caution in the</span> hardware design<span style="font-size: 12pt"> of </span>DSP <span style="font-size: 12pt">applying</span> system.</div><div style="line-height: 16pt"><b><span style="font-size: 12pt">Key words</span></b><b><span style="font-size: 12pt">：</span></b>DSP ,&nbsp; <span style="font-size: 12pt">hardware interface circuit , switching circuit</span></div>]]></summary><link rel="alternate" type="text/html" href="http://www.dadwj.cn/post/867.html"/><id>http://www.dadwj.cn/post/867.html</id></entry><entry><title type="html"><![CDATA[基于小波变换的谐波测量仪的DSP实现]]></title><author><name>kingmacth</name><uri>http://dadwj.cn/</uri><email>kingmacth@sina.com</email></author><category term="" scheme="http://www.dadwj.cn/catalog.asp?cate=10" label="论文"/><updated>2008-06-06T12:19:44+08:00</updated><published>2008-06-06T12:19:44+08:00</published><summary type="html"><![CDATA[<p><b>摘要</b>：介绍了基于瞬时无功功率理论的小波变换算法。通过在采样间隔里，每采样一个新的数据，就进行算法运算，可实时运算电力谐波和无功电流，这种算法比把所有或者一部分点都准备好后才进行运算的算法更实时，效率更高。最后描述了采用TMS320VC5402和AT89C51等电路实现了上述测量算法的硬件设计与软件设计过程及结果。</p><div><b>关键词</b>： DSP；谐波； 实时；小波变换</div>]]></summary><link rel="alternate" type="text/html" href="http://www.dadwj.cn/post/866.html"/><id>http://www.dadwj.cn/post/866.html</id></entry><entry><title type="html"><![CDATA[32位DSP两级cache的结构设计]]></title><author><name>kingmacth</name><uri>http://dadwj.cn/</uri><email>kingmacth@sina.com</email></author><category term="" scheme="http://www.dadwj.cn/catalog.asp?cate=10" label="论文"/><updated>2008-06-06T12:18:19+08:00</updated><published>2008-06-06T12:18:19+08:00</published><summary type="html"><![CDATA[<p><b>摘要：</b>采用自顶向下的流程设计了一款<span>32位DSP的cache。该cache采用两级结构，第一级采用哈佛结构，第二级采用普林斯顿结构。本文详细论述了该cache的结构设计及采用的算法。</span></p><div style="line-height: 16pt"><b>关键词： </b>cache，<span>DSP,存储系统.</span></div><div align="center"><b><span style="font-size: 16pt">&nbsp;The architecture of the 32-bit digital signal processor cache</span></b></div><div><b>Abstract: </b>A two-grade cache in the 32-bit DSP is designed with the top-down design flow. With the Harvard architecture in the first grade and the Princeton architecture in the second grade, the architecture and algorithm of the cache is explored in detail.</div><div><b>Keywords: </b>cache,DSP，<span>memory system.</span></div>]]></summary><link rel="alternate" type="text/html" href="http://www.dadwj.cn/post/865.html"/><id>http://www.dadwj.cn/post/865.html</id></entry><entry><title type="html"><![CDATA[二维DCT编码的DSP实现与优化]]></title><author><name>kingmacth</name><uri>http://dadwj.cn/</uri><email>kingmacth@sina.com</email></author><category term="" scheme="http://www.dadwj.cn/catalog.asp?cate=11" label="嵌入式"/><updated>2008-06-06T12:16:02+08:00</updated><published>2008-06-06T12:16:02+08:00</published><summary type="html"><![CDATA[<p><b>摘</b><b>&nbsp;</b><b>要：</b>介绍了图像的二维DCT变换原理，分析了<span>Loeffler的DCT变换算法。</span>根据DSP处理器BF533的结构和指令特点，使用汇编语言对DCT算法程序进行优化，并且在 BF533实验平台上进行验证。实验结果表明，优化后的代码无论在空间还是在时间上运算效率都得到很大提高。</p><div style="line-height: 16pt" align="left"><b>关键词：</b>DCT;&nbsp;&nbsp; DSP ; 代码优化</div><div style="line-height: 16pt" align="left">&nbsp;</div><div style="line-height: 16pt" align="center"><b>&nbsp;</b></div><div style="line-height: 16pt" align="center"><b><span style="font-size: 12pt">Implementation and Optimizationof Two-dimensional DCT Based on DSP</span></b></div><div style="line-height: 16pt" align="center"><b>Abstract</b></div><div style="line-height: 16pt"><b>&nbsp;</b>The principle of two dimensional Discrete Cosine Transform(DCT) is introduced in this paper. The algorithm of Loeffler&rsquo;s DCT is analyzed. The algorithm of DCT is performed in assembly according to the structure and characteristics of BF533. The codes mentioned above are run on ADSP-BF533 platform successfully. Experiment results show that optimized codes are more efficiency than before in whatever code store space and code execution time.</div><div style="line-height: 16pt"><b>Keywords: </b>DCT；<span> DSP；Code optimization</span></div>]]></summary><link rel="alternate" type="text/html" href="http://www.dadwj.cn/post/864.html"/><id>http://www.dadwj.cn/post/864.html</id></entry><entry><title type="html"><![CDATA[基于F2812的监测系统的设计]]></title><author><name>kingmacth</name><uri>http://dadwj.cn/</uri><email>kingmacth@sina.com</email></author><category term="" scheme="http://www.dadwj.cn/catalog.asp?cate=8" label="CPLD/FPGA"/><updated>2008-06-06T12:08:26+08:00</updated><published>2008-06-06T12:08:26+08:00</published><summary type="html"><![CDATA[<p><b>The design of monitoring system based on F2812 </b></p><div>&nbsp;</div><div><b>摘要：</b>本文提出了一种基于F2812并使用液晶显示的监测系统的设计方案，给出了系统的总体硬件结构框图，并详细介绍了F2812与液晶显示屏的接口设计以及液晶显示的程序设计。</div><div><b>关键字：</b>F2812&nbsp; DSP&nbsp; CPLD&nbsp; 液晶显示 &nbsp;SED-1335 &nbsp;</div><div><b>Abstract: </b>A design scheme about monitoring system that is based on F2812 and displayed with LCD is brought forward, &nbsp;the hardware architecture figure of the system is given, &nbsp;the design of hardware interface between F2812 and LCD ,and software design of LCD is discussed in detail in the paper.</div><div><b>Keywords:</b> F2812&nbsp; DSP&nbsp; CPLD&nbsp; LCD&nbsp; SED-1335</div>]]></summary><link rel="alternate" type="text/html" href="http://www.dadwj.cn/post/863.html"/><id>http://www.dadwj.cn/post/863.html</id></entry></feed>
